ch2 MOS device Ch1 Introduction
Ch5 Current Source
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1. Device Physics
• 1.1 Basic
– 1.1.1 Structure of MOSFET
（NFห้องสมุดไป่ตู้T）
• 栅（G: gate）、源（S: source）、漏（D: drain）、衬底（B: bulk）
ΦMS is the difference between the work functions of polysilicon gate and the sillicon substrate；
q is electron charge, Nsubis the doping concentration, Qdepis the charge in the depletion, Cox is the gate oxide capacitance per unit area;
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• MOSFET: 4-terminals device
• CMOS process
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N阱
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– 1.1.2 MOS symbol
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• 1.2 I/V characteristic of MOS
– 1.1.1 Threshold voltage
Over-drive VDSAT＝VGS-VTH
VGS
• Cut-off (VGS<VTH) ID＝0
When VGS≥VTH,
• Triode（linear region）（VDS<VGS-VTH）
• Saturation region（VDS≥VGS-VTH）
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PMOS
Actual direction
（NFET）
耗尽depletion (b); 反型开始onset of inversion (c)； 反型inversion（d）
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• Threshold （VTH）
The VTH of an NFET is usually defined as the gate voltage for which the interface is “as much n-type as the substrate is p-type.” ( NFET的VTH通常定义为界面 的电子浓度等于P型衬底的多子浓度时的栅压。)
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Why Analog Integrated Circuits?
Eggshell Analogy of Analog IC Design (Paul Gray)
Why CMOS Analog Integrated Circuits?
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• 0.2 Design Flow of Analog IC
其中，γ为体效应系数
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VTH 0
VTH
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– 1.3.2 Channel-length modulation
The actual length of the inverted channel gradually decreases as the potential difference of VDS increases. i.e. L’ is in fact a function of VDS.
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• 0.3 Analog and Mixed-signal IC
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0.4 structure of the course
AD/DA
PLL
Systems complex
Ch12 Switch capacitor
Ch14 oscillator
Ch9 opamp
Ch10 stability and freq. compensation
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εsi denotes the dielectric constant. 11
• “native” VTH
The native threshold value obtained from above equation may not be suited to circuit design, typically VTH=0±0.1V.
Design of Analog Integrated Circuits
Introduction Semi-conductor Device Physics
and Model
Outline
• 0. Introduction • 1. MOS Device Physics and Model
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ID reference direction
• Cutoff region ID＝0 • Triode（linear region）
• Saturation region
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• 1.3 Second-order effects
– 1.3.1 Body effect
For NMOS, when VB<VS, As VB becomes more negative, Qd increases before an inversion layer is formed, thus VTH also increases. This is called the “body effect” or the “backgate effect”.
It is typically adjusted bye implantation of dopants into the channel area during device fabrication.
For NMOS，typically adjusted to 0.7V.
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– 1.1.2 I/V of MOS device NMOS
Ch13 nonlinear and mismatch
Ch11 Band-gap Reference
Ch6 frequency response
Ch7 Noise
Ch8 Feedback
Ch3 single-stage amp. simple Circuits
Devices
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Ch4 differential amp.