astrotycoon 大道至简，贵在恒久力行Diagram for modern motherboard. The northbridge and southbridge make up the chipset.（补充: 北桥芯片用于与CPU、内存和AGP视频接口，这些接口具有很高的传输速率。
北桥芯片还起着存储器控制作用，因此Intel把该芯片标号为MCH（Memory Controller Hub）芯片。
南桥芯片用来管理低、中速的组件，例如，PCI总线、IDE硬盘接口、USB端口等，因此南桥芯片的名称为ICH（I/O Controller Hub））As you look at this, the crucial thing to keep in mind is that the CPU doesn’t really know anything about what it’s connected to. It talks to the outside world through its pins bu t it doesn’t care what that outside world is. It might be a motherboard in a computer but it could be a toaster, network router, brain implant, or CPU test bench. There are thre e main ways by which the CPU and the outside communicate: memory address space, I/O address space, and interrupts. We only worry about motherboards and memory for now.正如你所看到的，其实CPU是完全不知道自己与哪些外部器件相连接的。
CPU仅仅通过自己的引脚与外界沟通，而它并不关心自己是与什么设备在沟通。
或许是另一台计算机的主板，或许是烤面包机，网络路由器，脑植入医疗设备，又或许是CPU测试仪。
CPU主要通过三种方式与外界通信：内存地址空间，IO地址空间，和中断。
我们目前只关注主板和内存。
In a motherboard the CPU’s gateway to the world is the front-side bus connecting it to the northbridge. Whenever the CPU needs to read or write memory it does so via this b us. It uses some pins to transmit the physical memory address it wants to write or read, while other pins send the value to be written or receive the value being read. An Intel Core 2 QX6600 has 33 pins to transmit the physical memory address (so there are 233 choices of memory locations) and 64 pins to send or receive data (so data is transmitte d in a 64-bit data path, or 8-byte chunks). This allows the CPU to physically address 64 gigabytes of memory (233 locations * 8 bytes) although most chipsets only handle up to 8 gigs of RAM.CPU通过前端总线与北桥芯片连接，作为与外界通信的桥梁。
无论何时，CPU都可以通过前端总线来读写内存。
CPU通过一些引脚来传送想要读写物理内存的地址，同时通过另一些引脚来发送将要写入内存的数据或者接收从内存读取到的数据。
Intel Core 2 QX6600 用33个引脚来传送物理内存地址（因此共有233 个内存地址），并且用64个引脚来发送或接收数据（所以数据在64位通道中传输，也就是8字节的数据块）。
因此C PU可以访问64G的物理内存（233*8字节），尽管多数芯片组只能处理8G大小的物理内存。
Now comes the rub. We’re used to thinking of memory only in terms of RAM, the stuff programs read from and write to all the time. And indeed most of the memory requests from the processor are routed to RAM modules by the northbridge. But not all of them. Physical memory addresses are also used for communication with assorted devices on t he motherboard (this communication is called memory-mapped I/O). These devices include video cards, most PCI cards (say, a scanner or SCSI card), and also the flash mem ory that stores the BIOS.那么现在的问题是，通常一提起内存我们仅仅联想到RAM，以为程序一直读写的就只是RAM。
的确，绝大多数来自CPU的内存访问请求都被北桥芯片映射到了RAM。
但是，注意，不是全部。
物理内存同样可以用来与主板上的各种设备通信（这种通信方式被称为I/O内存映射）。
这些设备包括显卡，大多数PCI卡（比如，扫描仪，或者是SCSI卡），也包括存储BIOS的flash存储器。
When the northbridge receives a physical memory request it decides where to route it: should it go to RAM? Video card maybe? This routing is decided via the memory addres s map. For each region of physical memory addresses, the memory map knows the device that owns that region. The bulk of the addresses are mapped to RAM, but when the y aren’t the memory map tells the chipset which device should service requests for those addresses. This mapping of memory addresses away from RAM modules causes the c lassic hole in PC memory between 640KB and 1MB. A bigger hole arises when memory addresses are reserved for video cards and PCI devices. This is why 32-bit OSes have pr oblems using 4 gigs of RAM. In Linux the file /proc/iomem neatly lists these address range mappings. The diagram below shows a typical memory map for the first 4 gigs of p hysical memory addresses in an Intel PC:当北桥芯片接收到来自CPU的物理内存访问请求时，它将决定应该把该物理地址映射到哪里：是映射到RAM呢？还是显卡呢？这个映射过程是通过内存地址映射完成的。
内存地址映射知道物理内存地址的每一块区域所对应的设备。
大多数的物理地址都被映射到了RAM，但当请求的物理地址不是映射到RAM时，内存地址映射就告诉芯片组应该由哪一个设备来负责响应处理该物理地址请求。
在PC机物理内存地址中，地址640K到1M 的范围内很多区域并不是映射到RAM的，而是映射到各种各样的设备的。
尤其当为视频卡和PIC设备预留物理内存地址时，该内存区域映射到RAM的地址空间就越小。
这也就是为什么32位的操作系统不能完全使用4G RAM内存的原因。
在linux操作系统中，文件/process/iomem清晰地列出了这些地址范围的映射关系。
下图展现的是IntelPC机的前4G物理内存地址的典型的内存映射：Memory layout for the first 4 gigabytes in an Intel system.Actual addresses and ranges depend on the specific motherboard and devices present in the computer, but most Core 2 systems are pretty close to the above. All of the brown regions are mapped away from RAM. Remember that these are physical addresses that are used on the motherboard buses. Inside the CPU (for example, in the programs we r un and write), the memory addresses are logical and they must be translated by the CPU into a physical address before memory is accessed on the bus.实际的物理内存地址以及地址范围取决于计算机上不同的主板和设备，但是绝大多数Core 2系统的内存映射情况与上图很接近了。