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BucktoBuckconverter降压电路
1.量測Vphase和GND之間的訊號,觀察振鈴頻率
fR
2.找到一個可將振鈴頻率降低一半的電容,接在
Phase和GND之間.估算電路的寄生電容Cpar.
Buck converter introduce
Prepare by: Mars
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A buck converter is a step-down DC-DC converter. Its design is similar to the stepup boost converter, and like the boost converter it is a switched-mode power supply(SMPS) that uses two switches (a transistor and a diode), an inductor and a capacitor.
0
假設電感電流全部用于對Cout充電,那么
IC I L I Ripple
Vout ( Ri ppl e)
I Ripple ESR
1 C
1 2
I
Ripple
t
on
C
I Ripple ton
2(Vout(Ripple) I Ripple ESR)
Cout的選擇: 動態載
Qg大Switch loss大MOS發熱
PHighMOSloss
I
2 out
RDS(on)
D
1 2
I out
Vin
tsw
Fosc
Low side MOS: Rds(on)
Rds(on)大Conduction loss大MOS發熱
PLowMOSloss
I
L
I
2 max
2 Vout VRipple
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Cout ripple實測曲線
ESR
ESL
C
Channel 1:Vin waveform Channel 2:1.05Vo output waveform Channel 3:1.25Vo output waveform 靜態載波形
Low side MOS on:電流方向 L,CLoad
此時儲能元件L和C釋放能量,為L 和C提供電荷
E=1/2(L*IL*IL) E=1/2(C*U*U)
The two circuit configuration of a buck converter: Off state
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如右圖,假設電感電流全部用于對Cout充電,
可推導出如下公式:
Vout
L
di dt
Vout
L I max toff
toff
L I max Vout
Q
1 2 I max
toff
1
L
I
2 max
2 Vout
又 Q Cout VRipple
C 1
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Theory of Operation
High side MOS on:電流方向 VinLCLoad
此時Vin是電源,給儲能元件充電, 并向負載提供電荷
E=1/2(L*IL*IL) E=1/2(C*U*U)
The two circuit configuration of a buck converter: On state
Vi T 8L
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DCM and CCM boundary
In continuous mode:縱坐標即為D
In discontinuous mode:縱坐標即為
1
2L Io D2 Vi T
1
1
2
*
橫坐標 D2
1
D2 2 *橫坐標 D2
前面我們計算過,在邊界線上電流為:
IC Io Iin (High side MOS On) IC Iin (Low side MOS On)
Icrms
1 T
T 0
I
2 c
dt
1 T
DT 0
(Io
Iin )2
dt
T
I
2 in
dt
DT
1 T
(Io
Q
1
I
2 max
L
2 Vout
VRipple
Q Cout
I
2 max
L
Vout Cout
L
2 VRipple Cout
I
2 max
此為電感最大值, 注意 : 與Cout有關
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MOS的選擇
MOS主要參數: High side MOS: Qg
2 out
RDS(on)
(1
D)
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Snubber
高速開關會產生振鈴(Ring),這是因為開關節
點上的寄生電感和電容形成諧振回路.這種高頻
振鈴發生在Phase上升或下降階段,會影響道路的
性能和產生EMI.為了衰減振鈴,可在每個開關的
兩端增加一個串聯的RC阻尼回路.方法如下:
輸出Ripple也受其影響. Low side MOS存在Rds(on)(導通阻抗),Diode上也有Vf.這些參數會影響線路的
轉換效率 Buck線路的轉換效率實際多在80%~90%,其余多以熱量形式耗散 總體來說,雖然有些參數無法完全理想化,但對線路的影響較小,在做理論探討
時,可以忽略.
D T
Io
(Vi
Vo
)
D
T
(D
Vi
Vo Vo
2L
D)
Vo Vi
1 2L Io
1
D 2 Vi T
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DCM and CCM boundary
右圖為CCM和DCM的分界線,可以看出,與Duty 和電流皆有關,具體推導如下:
臨界狀態時:
DT T T D 1
Channel 1:Vin waveform Channel 2:1.05Vo output waveform Channel 3:1.25Vo output waveform 動態載波形
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Cin的選擇
輸入電容的選擇
輸入電容必須滿足開關電流造成的紋波電
流Irms的要求.
由此,我們可以看到,當橫坐標一定時,Duty和邊界線之間的關系
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小結
前面所論述的內容都是基于如下假設: 輸出電容足夠大,輸出電壓足夠穩定 在Low side MOS或者續流Diode上不存在壓降 Buck線路不存在任何損耗,轉換效率100%
實際應用,存在如下問題: 輸出電容容值有限,這主要是Cost原因 輸出電容存在ESR(等效串聯阻抗)和ESL.這兩個參數會影響線路的轉換效率,
The simplest way to reduce a DC voltage is to use a voltage divider circuit, but voltage dividers waste energy, since they operate by bleeding off excess power as heat; also, output voltage isn't regulated (varies with input voltage). A buck converter, on the other hand, can be remarkably efficient (easily up to 95% for integrated circuits) and self-regulating, making them useful for tasks such as converting the 12-24V typical battery voltage in a laptop down to the few volts needed by the processor.
Iin )2 DT
I
2 in
(T
DT)
Buck線路中Iin D I out
I crms I o D(1 D)
輸入電容首選非鉭電容,原因是其他電容能有效抑制上電時的浪涌電流,這種 浪涌電流常見與輸入端采用機械開關或鏈接器的系統中.為了得到最佳的可靠 性和使用壽命,應選擇在RMS輸入電流作用下溫升低于10度的電容.
因此,臨界狀態下的輸出電流為:
I o lim
I L max
(D 2
)
I L max 2
Iolim
Vi Vo 2L
D T
Vo D Vi
Iolim
Vi
(1 二次函數,所有參數不變
時,Duty=0.5時,臨界電流最大:
I o limmax
L
L
(Vi - Vo ) D T - Vo (T D T ) 0
Vo D Vi
因為Duty必定小于1,這就是降壓線路的原理
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Current discontinuous mode: