Fab14
Fab6
TSIP
WaferTech (Camas, WA, USA) Fab-6 ( 8”)
Value Chain of Semiconductor Industry
設備供應商
系 統 廠 商
IC 設 計 廠 商
IDM 廠商
系
EDA 與 設計服務廠商
IP供應商
光 罩 供 應 商
晶 圓 代 工 廠 商
IE的機會與挑戰 : 以IC晶圓製 造業為例
TSMC & Overseas Subsidiaries
TSMC USA
TSMC Europe WaferTech
TSMC Japan
TSMC Fab1 TSMC Fab8,12
VIS
TSMC Fab2,3,5,7
SSMC
TSMC Fab6,14
HSIP
07/’92~10/’92 Software procurement (ManSim 3.1.1)
10/’92~11/’92 Verification (Software acceptance test)
12/’92~03/’93 Fab2A modeling & Validation
04/’93~06/’93 Fab2A 1st case study (Hot run ratio analysis)
IC封裝
• 日月光 • 矽品 • 華泰 • 凌生 • 鑫成 • ...
測試
• 福雷 • 聯測 • 南茂 • 大眾 • 矽豐 • ...
出貨
Material Supplier
IC Manufacturing Flow
Wafer Fabrication
Testing
Assembly
Raw Wafer Chemicals Special gas
EQ resource (q'ty, uptime, eff.)
Planner, Scheduler and Simulator
PLANNER
Order Planning
SCHEDULER
Work Release
Work Dispatching
Factory Modeling
What If
Factory Status
製造管理
資材管理 (採購與物管) 人力資源管理
處 處 有 IE ...
風險管理
品質管理
MIS & CIM管理
專案管理
...
The Challenge of IE in Wafer Fab
Internationalization
Complicated Process
Technology
Vendor Follow up System
Source: Manufacturing Planning and Control Systems edited by Thomas E. Vollmann, William L. Berry and D. Clay Whybark
Capacity Planning: 4W1H
WHEN
Weekly, Monthly, Quarterly, Yearly
WHO HOW
IE, PC, MFG, Consultant
.Static models by spread sheet technique .Dynamic models by simulation technique
First Step
Fab-12
WSMC
ITRI
Fab-8 ( 8〞)
VIS
TASMC
Fab3/4
Fab-1 ( 6”)
Fab-12 (12”)
Fab-2 (6”)
SSMC (Singapore)
Fab-7 ( 8”)
Fab-3 (8”)
VIS (8”)
Fab-5 (8”)
Fab-14 ( 12”)
(Under Construction)
Managers/Supervisors are not familiar with simulation concept/methodology. Therefore, they don't feel confident of simulation result.
Full-Time vs. Part-Time assignment Tooling: The pre-defined shop floor control rule can not cover all of the
08/’93~11/’93 Fab2A 2nd case study (WIP vs Cycle Time analysis)
03/’94~12/’94 MES system interface development & Fab Managers Training
01/’’95
Fab2A 3rd case study (Bottleneck utilization vs C/T)
Capacity Requirement Planning (CRP)
Master Production Scheduling (MPS)
Material Requirement Planning (MRP)
Finite Loading
Input/Output Analysis
Shop Floor Control (SFC)
Bay
Bay
Bay
Bay
Bay
Bay
Inter-Bay AMHS
BayΒιβλιοθήκη BayBayBay
Bay
Bay
Intra-Bay AMHS
300mm Fab Model - Fully AMHS
Source: International SEMATACH
The features of Semiconductor Industry
process time by step
EQ resource (q'ty, uptime, eff.)
Capacity Requirement Planning system framework
MPS (weekly base)
Scheduled lots
Cycle time index (by steps group)
Fab's rule. Lack a good interface between Simulator and MES. The result of Stand alone application is not easy proved.
Reticle Design
Laser Mark
Oxidation
Photo resist
Diffusion
Reticle Develop Etch
Metal Sputter Ion Implant
Wafer Accept Test
Probing
IC Assembly
Final Test
Customer
Un-probed Wafer Probed Wafer Untested Package Tested Package
Fab Cross Section - 3 Level Fab
Exhaust Stacks
Level 3
Clean Subfab
Level 2
Utility Subfab
Level 1
Time Measurement / Time Study
Rough-Cut capacity planning system framework
MPS (monthly base)
process flow (by step)
Yield data
CRP Module
Capacity Requirement (EQ utilization)
摩爾定律：
IC上可容納的電晶體數目， 約每隔18個月便會增加一倍 ，性能也將提升一倍。
資本密集 技術密集 產品生命週期短 價格競爭激烈 市場應用領域廣 市場變動快且風險高 研究發展需求多 國際化競爭程度高
IE Job Opportunity in Wafer Fab
工業工程
生產企劃 (生管)
03/’95
Software upgrade from ManSim 3.1.1 to ManSim 3.5
04/’95~
IMPES concept proposal and MS/X On Time Survey
Barriers of Simulation Application
People:
SIMULATOR
Scenario Analysis
History of Simulation Application in TSMC
04/’91~06/’91
NCTU (SLAMII, PHOTO)
07/’91~12/’91 Software Survey (ManSim, Archilles, Promodel, Qplus)
Stair Case
Make-Up Air
Gas Cabinets
Air Return Shafts
Process Vacuum Line Main Process Supply systems
Source : M+W
Process Supply Submains
Scrubber
Fab Layout - Typical
封 裝 廠 商
統應
測
&
用