Mastering USB Physical Layer Validation Tektronix USB Testing Solutions Introduction
Sarah Boen
Silicon Phase Integration Phase
Deployment Phase
Tektronix Test Solution Updates
Source: USB 3.0 Rev 1.0 Specification
At Far End of Channel
TP1’CTLE
Source: USB 3.0 Rev 1.0 Specification
Source: USB 3.0 Specification
Cable
VBUS
Tx Channel
Rx Channel
USB3_Rx
USB3_Tx
Tx Channel Rx Channel
Tx Channel Rx Channel
Rx Channel
Ellisys USB Explorer 280
SuperSpeed USB 3.0 Protocol Analyzer and Traffic Generator
Typical Host Emulation Setup
with Protocol Analyzer
Typical Protocol Analyzer Setup
Wireless USB
•
Wireless USB Applications
– Short-range communication for the transmission of large amount of data
• • • Point-to-point Access point between WUSB host and peripheral Up to 127 devices
&/or &/or &/or
IP
WiMedia UWB Radio Platform MAC and Policies WiMedia PHY (MB-OFDM)
PAL: Protocol Adaptation Layer
–
Leveraging unlicensed and existing licensed RF spectrum
• Low-power and frequency hopping signals to minimize interference
•
Challenges
– – Data throughput, bandwidth allocation Power management and security
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Tektronix Wireless USB Validation Solution
•
Easy to setup: Automatically detect Time Frequency Codes (TFCs) and data rates from the RF waveform header Demodulate, Analyze and Record measurements of each packet independently Perform Measurements Outlined in the Wireless USB EVM Test Specification Industry’s only MOI (Method of Implementation) for WiMedia test!
– WUSB EVM test is a subset of WiMedia PHY certification
•
•
•
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Powerful Debug Analysis
Analyze EVM Errors of Time and Frequency
• •
EVM versus Symbol: Debug symbols over time EVM versus Subcarrier: Debug EVM error over frequency
Correlate frequency and time domains with cursors linking amplitude versus time, frequency versus time and power versus frequency displays
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Tektronix USB Solution
Complete solution from PHY layer to Protocol for USB 2.0, 3.0 and Wireless USB
USB leadership: Tektronix is active in USB-IF Compliance Group and
USB 3.0 PIL and contributes to USB 3.0 specification
Cost Effective: Automation with a single box solution Connectivity: Measure closest to Tx output for true performance of
USB 3.0 device/host
Flexibility: Compliance, debug, characterization with software
channel emulation
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High Speed Serial Test Challenges
Design Verification Compliance Test
Transaction Layer
System Integration
Digital Validation & Debug
Data Link Analysis
Digital validation & Debug
Data Link Layer
Logical Sub-block
Simulation
Transmitter Test Signal Integrity
Eye and Jitter Analysis Characterization & Validation
Receiver Test Receiver Test
Direct Synthesis
Compliance Testing
Physical Layer
+ -
Electrical Sub-block
Interconnect Test & Link Analysis Serial Data Network & Link Analysis
Tx
+ + -
path
+ -
Rx
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Resources
•
Access to Specifications
– Rev 1.0, /developers/docs/
•
Tektronix USB Electrical PHY Tools
– – /usb /software
•
Ellisys Protocol Tools
–
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Enabling Innovation in the Digital Age
Accelerating Performance
Enabled by High-speed Serial Technologies







。