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四川大学软件系统形式化验证(双语)Software System Model Checking教学大纲

College of Software Engineering
Undergraduate Course Syllabus Course ID 311031020 Course Name Software System Model Checking
Course Attribute □Compulsory
■Selective
Course
Language
■English
□Chinese
Credit Hour 2 Period 32
Semester □First Fall □First Spring □Second Fall □Second Spring ■Third Fall □Third Spring □Fourth Fall □Fourth Spring
Instructors Song Xiaoyu
Description
Today, software systems are widely used in applications where failure is unacceptable. Because of the success of the Internet and embedded systems in automobiles, airplanes, and other safety critical systems, we are likely to become even more dependent on the proper functioning of computing devices in the future. Due to this rapid growth in technology, it will become more important to develop methods that increase our confidence in the correctness of such systems.
Traditional verification techniques use simulators with handcrafted or random test vectors to validate the design. Unfortunately, generating test vectors is very labor-intensive. The overall complexity of the designed systems implies that simulation cannot remain the sole means of design verification, and one must look at alternative methods to complement simulation. Recent years have brought about the development of powerful formal verification tools for verifying of software systems. By now, the information technology industry has realized the impact and importance of such tools in their own design and implementation processes.
The objective of the course is to introduce the participants to the practical formal verification techniques for hardware/software systems that are beginning to penetrate industrial applications. Topics to be covered include: system modeling, formal logics for system verification (Boolean & first-order logic, higher-order logic, temporal logic), formal specifications, CTL model checking, BDDs, applications of theorem proving systems, and SA T solvers. Exercises are provided in the class.
Prerequisites
Software and Hardware Systems, Discrete Mathematics. Any senior or graduate student in ECE and CS is welcome to take this course.
T extbook E. Clark, O. Grumberg, D. Peled, "Model Checking", MIT Press, 2000. Resource Lecture notes.
Grading Assignments, attendance rate (40%) and final exam (60%)
T opics Introduction to verification technology. Understand the basic notions of correctness Introduction to formal logics. Understand the basic notions for logics, proofs, specifications. System modeling. Understand the importance of system modeling and specification. Temporal logics. Understand the basic notions of temporal logics.
Temporal Logic and Modeling Checking. Understand the extension of CTL, CTL*, etc. Modeling Checking with fixpoint computation.
Boolean representations. Find a canonical Boolean representation, etc.
Symbolic verification based on BDD and SA T.
Symbolic Simulation, BMC
Theorem proving systems. L TL model checking, Buchi automata, Omega- automata, etc.
T ools & Environment Projects SAT-based verification Version No Version No:: 1.0 Author Author:: Date Date:: 20020099-6-10 Auditor Auditor:: Mei Hong Date Date:: 20020099-6-1010
Signature of leader Signature of leader:: Date Date::20020099-6-1010。

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