Seal to PL pattern
SPEC
20”以上≧ 1200um 14”~19” ≧ 1000um
14”以下≧ 800um
≧ 1800um Cr. BM =150um Resin BM : 註一
350um T1: ≧ 1100um,Typ:1200um
T0: ≧ 600um,Typ.:700um T1: ≧ 800um,Typ:900um T0: ≧ 400um,Typ.:500um
阻抗需求 -----
< 170 Ω < 170 Ω < 170 Ω < 90 Ω
< 170 Ω
< 170 Ω
< 90 Ω < 30 Ω l test mode
Test mode
優點
缺點
Switch TFT
◆Cell Test完成後無須去除switch TFT 製程
Laser cut ◆Lay shorting bar簡易可省空間
Date fan-out
IC alignment mark IC Shift mark
IC bonding pad
0.5
0.5
CF Glass TFT Glass
IC
FPC
設計考量： 1.IC to CF edge design需考量panel切裂公差±0.2mm及IC熱壓頭機構尺寸 2.IC to FPC edge需考量fan-out layout空間及FPC Bonding shift
◆原物料受限 ◆投資金額相對提高
Remark:◇中小尺寸面板封裝技術需著重輕薄及降低封裝成本的因素，COG方式可滿足此需求
WOA layout design
WOA ( Wire On Array ) 來替代FPC來連接Gate及Data側資料. 此種 Layout可減輕面板重量及降低成本.
WOA
COF+WOA
19.0”W Panel layout
Repair COM
Data fan-out
Floating Diode
Data fan-out
Repair Floating Diode
Dummy metal
Gate fan-out
COM
Floating Diode
Repair
Floating
COM
Floating Diode Repair
◆Rework易造成面板及IC的損毀 ◆COG所佔面板玻璃的封裝區域大，所
需額緣較大
將IC、主被動元
COF (Chip On Film)
件先以覆晶方式 封裝於軟板上， 再與玻璃基板接
合
◆可應用於較高階的顯示器 ◆細線路的驅動IC封裝上較具優勢 ◆可避免因IC Bonding失誤造成面
板報廢的損失 ◆可放置被動元件
FIB-3
Panel Cross design
1.考量G/S short issue,於M1/M2 cross處墊AS pattern. 2.AS pattern於M2側做凸狀設計,可改善M2跨越M1斷線狀況.
Metal 2
6um (Min.≧ 3um) AS Pattern
3um
1 3um Metal 1
500um
Glass
BM
Seal edge
Active area
E
B A
C D
F
G
Panel contact design
利用contact via + ITO將互相垂直之M1 & M2轉接,需考量空間利用及線寬阻抗
M1 垂直 contact to M2
Metal 2 1
>3um >5um VIA
3. Substrate Layout
· Array Test · ESD Protection · CF/TFT Insertion Direction Mark · 光罩排板 · 光罩Stiching
1. Introduction
NB 12.1”W~ 15.6”W
Mobile Phone/PDA 2.0”~3.8”
SPEC
20”以上≧ 1200um 14”~19” ≧ 1000um 14”以下≧ 800um
≧ 1800um Min.:250um
350um T1: ≧ 1100um,Typ:1200um
T0: ≧ 600um,Typ.:700um T1: ≧ 800um,Typ:900um T0: ≧ 400um,Typ.:500um
CF outline
Full contact搭配COG
ITO 加粗 為避 免ITO被壓斷.
ITO to ITO 15um
ITO to ITO 20um (包含IC bonding shift量)
IC bonding pad
Cell test pad
Cell Spec. design _ BM Type
畫面顯示
Cell test design
1.Switch TFT 利用電壓充放電,使TFT作 動達到shorting bar功能,使測試訊號能驅 動 panel pixel.
2. Switch TFT design Panel常因刮傷造 成亮線及斷線Issue,目前將漸以laser cut design取代 , switch TFT
Floating COM
Dummy metal
LCD driver bonding mode
PCB FPC
Chip
COF
Chip bonding area bonding pads
COG Layout
COF bonding pad
COF Layout
COG Bonding area design
面板架構簡介
Contents
1. Introduction
· Structure of TFT LCD · Wide View Technology
2. Panel Layout
· LCD Driver · WOA Resistance · Cell Test · Cell Spec. · Panel Fanout Design · ESD Protection
Item
Seal width (A)
BM width (B) BM edge to seal edge (C) Seal edge to scribe edge (D)
PI edge to AA (E)
PI edge to seal edge (F) Transfer center to Glass edge(G)
◆Shorting bar Switch TFT設計，易因刮傷造成 短斷路發生
◆Shorting bar Switch TFT設計，所需layout空間 較大
◆Shorting bar Switch TFT設計，較易漏電而產生 測試異常
◆設備及治具投資金額相對提高 ◆Cell Test測試完成後需切斷shorting bar，而增
500um
Min.=250um Seal 轉折處 Min.=350um
Min.=300um Seal 轉折處 Min.=350um
PI
Active area E
Seal
A B
Glass edge
C D
F
BM
G
Cell Spec. design _ Open Type
Transfer pad
Seal BM PI
VGH VCOM
Function 檢測 FPC(COF) Bonding是否有Open(正常是Short) &EE量測阻抗用。 TFT關機用，Output All Gate Turn On Control 。 Vertical (Data) Shift Clock Input。 Gate Driver Output Control。 Device Start Pulse Input / Output，必須取決於U_D Pin。 Ground Pin。 Shift Direction Control Pin。 “H”：STV1(input) Out1~Out300 STV2(output) “L”：STV2(input) Out300~Out1 STV1(output) Output Channel Number Selection。 為“H” or Open時，300 Channel Output。 為“L” 時，270 Channel Output。 Supply Power For Circuit。(邏輯Power,管制Gate動作) Supply Power For Circuit。(負電壓) Supply Power For Circuit。(正電壓) TFT Panel Common Signal。
AS 23
>3um
ITO >5um Metal 1
M2邊緣墊AS,可防止ITO斷裂.
M2 =0 or >2um
ITO
>3um
AS
VIA
>3um
>3um =0 or >2um
=0 or >2um
BP SD
AS
ITO GI
M1
FIB-1
SD AS
ITO GI
M1
FIB-2
ITO BP
AS GI M1
M1
W
L
對稱式TFT
W
L
非對稱式TFT
Vgg GO GE
Switch TFT
GO GE
Laser cut
Full contact design
Full contact搭配COF
COF