鑽孔加工1.The tolerance of NPTH +0.05/-0mm is too tight to meet.Relax it to: +/-0.05mm.2.The tolerance of the slot is 0.0365”+/-0.001”. For ease of manufacture capability we suggest to relax it to 0.0365’’+/-0.002’’.3.The tolerance of the holes with dia.0.92mm & dia.2.3mm is +/-0.05mm.We couldn’t ensure this tolerance to PTH at all.Suggestion: Relax it to +/-0.076mm.4.There is a small overlap between the two PTH.Suggestion: We will build the holes as the slots 1.30mm*3.5mm. Please confirm.5.The finish hole size on the drill chart is different from the Gerber data.Drill chart :0. 6mm. Gerber data:0. 675mm.Drill chart: 2.0mm. Gerber data: 2.1mm. See attachment 3Suggestion: We will follow the Gerber data.Please confirm!6.There are some duplicate holes in the Gerber. For attachment 8, if there are no slots we will only retain one NPTH. For attachment 7 we will remove the small hole.7.The quantities of the stamp holes on the drawing (19) are different from the Gerber data (11). We will build the PCB according to the Gerber data.8.We will use routing process to build the slots because of the long slots will take long time during drilling process.But the tolerance of the slots is only +/-0.05mm.For ease of manufacture capability we suggest to relax it to +/-0.127mm.9.The size of the two PTH (dia.1.6mm) is just the same as the Pads and the solder mask openings.Suggestion: We couldn't build the PTH without annular ring so please choose A or B: A: Build the two holes as NPTH and we will enlarge S/M opening and keep the clearance 0.003" each side.B: Build the two holes as PTH and we will enlarge the pads and keep the annular ring 0.008" and also will enlarge the S/M opening and keep the clearance 0.003" each side. We will build the rectangle slot (1.7X3.0mm) as oval one.10.The quantity of the stamp holes on the drawing (19) is different from the Gerber data(11).Suggestion: We will build the PCB according to the Gerber data.11.There are some data on the drill map are different from the Gerber data. Suggestion: We will follow the Gerber data to build the PCB.內層問題1.All the non functional pads are to be removed on inner layers.2.The width of the isolated line on layer 3 is only 0.010".Suggestion: We will change it to 0.012". Please confirm!外層線路問題1.We will etch our company logo, UL logo, reverse “UR” and Date Code on backside. (Location sees attachment V)2.The pad of the PTH (dia.0.131”) is so close to the outline on both sides. It will be damaged after routing process.Suggestion: In order to avoid copper exposure of the pad, we will properly shave the edge of the pad on both side and keep the space 0.010” to the outline. We will also narrow the corresponding solder mask opening.3.The distance between the circular lines and the outline is too short only 0.0036" on component side. It may cause copper exposedness.4.We will properly narrow the space between the circular lines to keep the distance 0.018" between the lines to the V-cut line.5.The distance between the copper and the outline is two short only 0.003" on both sides. We will shave the copper to keep the space 0.018" between the copper and the V-cut line. 防焊問題1.The size of some pads’solder mask opening is just the same as the pads (edit Gerber). We propose to enlarge the solder mask opening and keep the clearance 3mil each side. (Example sees attachment VII)A matt (non glossy) green solder mask2.All via holes including BGA via holes have solder mask opening on both sides. Suggestion: Please choose a) or b)a)Follow the Gerber.b)To Plug via holes in the BGA and the other via holes are to be followed the Gerber.3.The space between the IC pads is only 0.0077”. It is difficult to keep solder mask bridge. Suggestion: For ease of manufacture capability, we suggest to remove these solder mask bridge. Please confirm.4.The solder mask opening of the fiducial mark is too large and it will cause to copper exposure of the trace around it.Suggestion: we will properly shave the edge of the fiducial mark's solder mask opening and keep the space 0.004" to the trace. Please confirm!5.Here are some via holes only have single side solder mask opening (solder side). Please choose A or B:A: Follow the Gerber data and accept the appearance of the solder ball on solder side.B: Add solder mask opening to these holes (the same size as drill bit) on component side.6.There is no space between the board edge (reference places) and the V-cut line.Please choose A or B:A)Follow the Gerber and accept the copper expose on board edge.B)Shave the copper and keep the space between the board edge and the V-cut line 0.020".7.The feet of all gold fingers are covered with solder mask on both sides.Suggestion: We will follow the Gerber to build the PCB.文字問題1.Some legends are printed on the pads and the holes. (Example sees attachment VII) Suggestion: We will properly move these legends, but if there is no enough room to move, we will clip these legends with solder-mask openings. Please confirm.機戒加工問題1.The fabrication drawing is not including the breakaway. Please provide the new completed drawing, all the data should be marked clearly (including the connecting method between the breakaway and the board).2.The tolerance of the routing is too tight to meet.Relax it to: +/-0.10m3.For better control the V-CUT quality, we will add the pattern for V-CUT check. (Location sees attachment VII)4.The data on the fabrication drawing is different from the Gerber data.FAB: 1.774 Gerber data: 1.754The dimension 0.984" marked on fabrication drawing is wrong obviously. It should be0.0984".Suggestion: Please confirm the dimension is 0.0984”!5.We will follow the Gerber data to build the PCB, please confirm!6.There is some places dimension on the fabrication drawing is different from the Gerber data. We will follow the FAB. Drawing to build the PCB.Suggestion: We will follow the FAB. Drawing to build the PCB.Dimension 1.71mm should be 1.43mm.7.The Gold Fingers’edges extend to the outline. It will be damaged after beveling process.Suggestion: In order to avoid the copper exposure of the Gold Fingers’edge, we will properly shave the Gold Finger’s edge and keep the space 0.040’’to the outline.8.The range of the V-CUT remains thickness on the fabrication drawing is 0.015’’-0.020’’.Suggestion: This range is too difficult to meet and we suggest to control the V-CUT remain thickness as 0.016’’+/-0.004’’.10.There is no beveling specification to be provided on the fabrication drawing Suggestion: Please choose A or B:A: Bevel angle: 20~30, Bevel depth: 0.030"+/-0.005". But the space from the Gold Finger edge to the outline is only 0.0265". In order to avoid damage the gold finger during beveling process we will properly shave the gold finger’s edge and keep the space 0.040" to the outline. Please confirm!B: Provide beveling specification.11.The space between the board edge and the V-cut line is 0.175". In order to avoid copper exposure, we will properly shave the copper and keep the space 0.2".12.The tolerance of the holes to the board edge (5.0+0.1/-0mm) is too tight to meet. Relax it to 5.0+/-0.1mm! Please confirm!13.The dimension of two places (0.297" & 0.968") is different from the Gerber data. Suggestion: We will follow the Gerber data: 0.303"& 0.972".14.The internal corners can't be the right ones after routing process.15.Some places dimension on the Gerber is different from the fabrication drawing. "BEVELED EDGE ONLY INGOLD EDGE TAB AREA" is required in NOTES. We couldn't only bevel the gold edge.Suggestion: The beveled edge will be from A to B.16.According to the Gerber data we think the dimension 0.84"(see Detail E) should be0.837".17.We think the "CU: 35um" should be the finished copper thickness.18.As attachment, the data we marked are different from gerber data .Suggestion: We follow the fabrication drawing to build the PCB. Sample we will follow the suggestion.常用英文單詞detail(詳細) appear(出現) oval(橢圓形)rectangle(長方形,矩形)/square(正方形) circular(圓形) enlarge(擴大)positive(正的) negative(負的) corresponding(相應的)adjacent(臨近的,接近的) Indicate(指出,簡要說明) accuracy(精確性,正確度) attachment(附件,附加裝置) build(製作,構造) confirm(確認)Provide(提供) exact(精確的,準確的) routing method(方法) modify(更改,修改) board edge(板邊) avoid(避免)according to(依照,挶) ignore(忽視) properly(適當地.完全地) Inner layer/internal layer(內層) thermal pad(散熱盤) isolation pad(孤立盤) dummy pad(假盤) non functional land(無功能連接盤)separation line(隔離線) clearance hole(隔離孔)Layer-to-layer spacing(層間距) layer-to-layer registration(層對準度)dielectric(絕緣層) multilayer construction(層疊構)ground plane clearance(接地層隔離) voltage plane clearance(電源層隔離)base copper(基銅) finish board thickness(成品板厚)multilayer lay up(多層疊層) drilling(鑽孔) blind via(盲孔)buried via(埋孔) component hole(元件孔)mounting hole(安裝孔) dimensioned hole(注尺寸孔)hole location(孔位) foil burr(箔毛刺) close hole(近孔) duplicate hole(重孔) touch hole(疊孔)stamp/perforated hole(郵票孔) electro plate(電鍍) electroless plating(無電鍍) tenting(一銅蓋孔法) minimum plating thickness(電鍍最小厚度)sold plate stripping method(二銅圖形電鍍法) fiducial mark(光學點) component(元件) pattern(圖形) conductor width(導線寬度) conductor base width(導線底寬) conductor base spacing(導線底距)test pattern(測試圖形) hole breakout(孔破)minimum annular ring(最小環寬) annular ring(環寬) external layer(外層) conductor spacing(導線間距) etching(蝕刻)design spacing conductor(導線設計間距) design width of conductor(導線設計寬度) photo sensitive liquid typ sold resist(液態感光型防焊)the solder resist clearance(防焊凈空度) solder mask opening(防焊開窗)solder plug(焊料塞孔) solder resist(阻焊劑)clearance solder mask ink(防焊油墨) silk screen(文字印刷)legend/symbol/letter printing(文字,標記) mark(標記)Manufacturing drawing(加工圖) puching(沖切)all internal radil to be 1.0maxinum chamfer(倒角)chamfer all external corners 0.5*45DEG edge spacing(邊距)datum reference(參考基準) V-grooving(V-CUT) DIMENNew words:Notes : unless otherwise specified1.Manufacture per Maxtor spec NO 10207. Finish to be SMOBC/HASL(噴錫)2.Soldermask to cover via pads on top/primary side.0.25 minimum soldermask betweenvia hole and smd pad required. Via pads are left exposed on bottom/secondary side per artwork. See ODB++ note for soldermask modifications.3.All internal radii to be 1.0mm maximum.4.Artwork depictions for reference and quotes only.5.Nominal finished conductor width =0.15mm+/-20%.6.Nominal finished conductor spacing=0.15mm+/-20%.7.Construction of multilayer.8.Chamfer all external corners 0.5x45DEG.9.Connector pads on bottom/solder/secondary side to be flat within 0.025mm.soldermask thickness 0.038mm.10.Vendor to silkscreen 4 digit date code (WWYY). UL logo and flame rating in specifiedarea on top/component/primary side. Flame rating must be 94v-1 or better.11.Build in 4-up array per “array”layer in artwork.12.1.24 shall be formed by route/drill.。