当前位置:文档之家› IIC总线协议中文版(IEEE标准版)

IIC总线协议中文版(IEEE标准版)

I2C

1

I2C (3)

2.1 (4)

2.2 (5)

3

I2C (6)

5

(7)

6.1 (7)

6.2 (8)

7

(10)

8.1 (10)

8.2 (10)

8.3 (11)

9

7 (13)

10.1 (13)

10.1.1 (14)

10.1.2 (15)

10.1.3 CBUS (16)

11

(17)

13

I/O (26)

15.1 (26)

15.2 Hs (28)

16

(33)

17.1 I2C (33)

17.2 I2C (34)

17.3 (34)

17.4 I2C R

p R S (35)

17.5 Hs I2C R

p R S (35)

18

Philips (37)

20

4400kbit/s

0~100kbit/s I 2C

1024

1.2

2.0-1998

I 2

C

Hs

I 2

C

2V

0.6V 6mA

Hs

13.222

6

7

2

LCD

RAM

DTMF

IC

Philips

150

CMOS

I 2

C

IC

I 2

C

I 2

C

SCL

8

100kbit/s

3.4Mbit/s

1I 2

C

I 2

C

IC

IC

I 2

C

IC

IC

1 I 2

C

a b

I 2

C

P C B

I 2

C

IC SO I 2

C

IC

IC ROM

3

I/O

IC

4

NMOS SDA

SCL

LCD

1

1 I2C

I2C

A B

A B

A

B

A

A

I2

C I2

C

1

SCL

S DA

S C L

MICRO -

CONTROLLER

A

STATIC

RAM OR

EEPROM

LCD

DRIVER

GATE

ARRAY ADC

MICRO -

CONTROLLER

B

2

I

2C

I2

C

5

I2

C

100kbit/s

3.4Mbit/s

13

I

2

C

15

6.1

SDA

4

SCLKN1

OUT

SCLK IN

SCLK

DATAN1

OUT DATA IN DEVICE 1

SDA (Serial Data Line)

SCL (Serial Clock Line)

SCLKN2

OUT SCLK IN

SCLK DATAN2OUT DATA IN DEVICE 2

V DD

R p

R p

pull-up resistors

3I 2

C

data line stable;data valid

change of data allowed

SDA

SCL

4 I 2

C

6.2I 2

C S P 5

SDA

SCL

15

Sr

S

SDA SCL

P

STOP condition

SDA

SCL

S

START condition

5

司机

7

SCL

CBUS

10.1.3

SDA

SDA

7

6 I 2

C

7 I2

C

8

8

C LK

1

CLK

2

SCL

start counting

8

SCL

10

14

Hs

8

13

9

DATA1

SDA

DATA 1

DATA 2

SDA

SCL

9

I

2

C

8.3

SCL

相关主题