3. Test Mode Select (TMS) 4. Test Clock 5. Test Reset (TCK) (TRST) =>可以省略不用
BScan Basics
*註=>通常用六個Clock，當作一個Reset
Intelligent Boundary Scan Solutions®
Boundary Scan Test測試之原理(三) 所謂[測試存取埠]:TAP(Test Access Port) =>係指為進行測試邏輯電路之指令，測試 數據或測試結果等數據加入輸入/輸出之串 列介面，上述4條信號線，經由外界之電 腦主機加以控制，以便執行BScan測試。
n
Bypass Register
0
TDO
Instructions Register TCK TMS
TAP Controller
10/16/2018
BScan Basics
No. 12
IEEE-1532
In-System Programming
Intelligent Boundary Scan Solutions®
BScan Basics
TDO
No. 9
IEEE-1149.1
Intelligent Boundary Scan Solutions®
Standard Device
Pin Core Logic
10/16/2018
BScan Basics
No. 10
IEEE-1149.1
BScan Device
Pin Core Logic ... some extra “intelligence” is needed for Test Access
BScan Basics
TDI,TDO串接方式注意
Intelligent Boundary Scan Solutions®
• Boundary Scan controller 的連接器上的
TDI ，接到串接上第一個 BS IC 的 TDI ，第一個 BS IC 的 TDO 接第二個 IC 的 TDI，以此類推； 最後一個 IC 的 TDO 則接連接器上的 TDO。
BScan Basics
Intelligent Boundary Scan Solutions®
Boundary Scan Test測試之原理(二)
若PCB印刷基板採用BScan測試相容元件時， 最多僅需5條(通常為4條)之專用線，即可測試:
1. Test Data In 2. Test Data Out (TDI ) (TDO)
What FPT Can TEST?
• 類比元件的值 • 特性
Intelligent Boundary Scan Solutions®
• Resistor • Capacitor • Inductor • Transistor
• 臨近元件的短路測試 • Non-BGA IC腳的
• 無治具 ICT 測試
*註=>通常用六個Clock，當作一個Reset
BScan Basics
板子上整個連接到 Boundary Scan 的介面連接器
Intelligent Boundary Scan Solutions®
• I/O Interface，10PIN 100mil公的連接器
PIN1 PIN3 PIN5 PIN7 PIN9
若PCB印刷基板採用BScan測試相容元件時， 最多僅需5條(通常為4條)之專用線，即可測試:
1. Test Data In (TDI )
2. Test Mode Select (TMS) 4. Test Clock 5. Test Reset (TCK) (TRST) =>可以省略不用
10/16/2018 BScan Basics No. 13
IEEE-1532=> In-System-Programming
Conclusion
Intelligent Boundary Scan Solutions®
• IEEE 1532 can be used for programming of
TCK TMS TDO TDI
PIN2 PIN4 PIN6 PIN8
GND GND GND GND NC
TRST PIN10
BScan Basics
串接方式為TMS,TCK,TRST並聯 ，TDI,TDO串聯
Intelligent Boundary Scan Solutions®
TDI
TDO
TDO TMS TCK TDI
No. 11
BScan Basics
IEEE-1149.1
Intelligent Boundary Scan Solutions®
Test Access Port (TAP ) 測試存取埠
Data Register
n 0
BScan Register
31 0
0
MUX
IDcode Register, opt. TDI
Intelligent Boundary Scan Solutions®
Boundary Scan Overview
「邊界掃描測試」
測試原理與應用
Intelligent Boundary Scan Solutions®
Boundary Scan Test測試之定義
所謂邊界(Boundary):係指IC腳端與內 部(功能邏輯閘)晶片間之接點。 換言之進行掃描測試IC腳端與晶片間之 接點邊界，係所謂之「邊界掃描測試」。 1990年經由IEEE 1149.1加以規格化之 BST測試，俗稱為「邊界掃描測試」 (Boundary Scan Test)
Intelligent Boundary Scan Solutions®
BScan Cell
Test Data In Test Clock
(TDI) (TCK)
Test Access Port
Test Mode Select (TMS)
10/16/2018
(TAP) TCK
Test Data Out (TDO)
• 簡易型AOI功能 • 速度稍慢 • 可涵蓋所有被動零
開路測試 • 上電後電壓/電流測試
BScan Basics
件測試 • 短路測試為選擇性 考量
What Boundary Scan Can Test
• 數位邏輯 IC 零件: •
Intelligent Boundary Scan Solutions®
• IEEE-1149.5=> system level test • IEEE-1149.6=> Differential & AC coupled
networks
• IEEE-1532
10/16/2018
=> In-System-Programming
BScan Basics No. 3
Intelligent Boundary Scan Solutions®
from different vendors can be programmed concurrently • Programming algorithm and data are separated
10/16/2018 BScan Basics No. 14
Integration with Flying Probe Tester (BScan+FPT)
Terms synonyms with IEEE Std 1149.1 Boundary Scan / BSCAN / BST JTAG (Joint Test Action Group)
10/16/2018 BScan Basics No. 4
Boundary Scan Test測試之必要性
Intelligent Boundary Scan Solutions®
BScan Basics
Boundary Scan Layout information 「邊界掃描測試」 相容線路設計需知
Intelligent Boundary Scan Solutions®
Boundary Scan Test測試之原理
Intelligent Boundary Scan Solutions®
• a single device on a device programmer • a single device in-system • multiple devices concurrently in-system
• Standard conform devices of different types
BScan Basics
Boundary Scan Test測試之功能
Intelligent Boundary Scan Solutions®
<1> 元件之誤插接及臨近元件的短路測試
<2> 外界電路與元件間之輸入/輸出信號監視
<3> 元件間之互接測試(Interconnecting Test)
<4> 可測試BGA元件之開路與短路作測試
<5> Non-BGA IC腳的開路測試
<6> 可在板上燒錄資料(ISP) Flash / EEPROM
(ISP) PLD / FPGA Devices <7> 內部邏輯電路之功能測試
BScan Basics
IEEE-1149.1
Testbus Signals
Intelligent Boundary Scan Solutions®
Bscan Cell
BScan nets
BScandevice