6
Page 82
I-10
Page 79
K-1 Page 80 I-4
TO FUNCTION (2) CB505
TO DSP CB7 TO FUNCTION (1) CB309
7
0
8
9
IC801 : M66003-0101FP FL Display Driver
Display code RAM (8-bit x 60)
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
TO POWER TRANSFORMER
4.1 0 4.9 4.1
~
~
~
~
~
~
~
0
3.7
4.9
Page 79
4.8 –28.4 4.8 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ 4.8
F-1
2
TO DSP CB3
~Hale Waihona Puke ~~~~ ~ ~ –26.3 ~ ~ ~ ~ ~ ~
4.1 0
4.1
2
4.8 4.8
4.9
0
3.7
4.9
Page 79
F-1
TO DSP CB3
–28.4 4.8 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~
~
~
~
~
~ ~ ~ –26.3 ~ ~ ~
~ –26.3 ~
~
–25.1
3
~ ~ ~ ~ ~ –24.4 –20.6
~ 4.8
4.8
2.2 0.1 0 4.9 4.9 4.9 4.9
A
B
C
D
E
F
G
H
I
J
K
L
M
N
RX-V750/DSP-AX750/DSP-AX750SE RX-V650/HTR-5760
s SCHEMATIC DIAGRAM (OPERATION)
1
RX-V750/DSP-AX750/DSP-AX750SE/RX-V650
4.1
–23.1
–23.1
–26.4
–26.4
1
–26.4 –26.4
HTR-5760
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–28.4
–23.1
–26.4
–26.4
–26.4
–22.5
–20.6
–26.4
–24.4
–23.1
–24.4
–26.3
–23.1
–23.1
~
~
~
~
~
~
~
~
4.1
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–28.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–22.5
–20.6
–24.4
–24.4
–26.3
–23.1
–23.1
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
TO POWER TRANSFORMER
I-10
Page 79
K-1
TO FUNCTION (2) CB505
TO DSP CB7 Page 80 I-4
7
TO FUNCTION (1) CB309
0
8
9
IC801 : M66003-0101FP FL Display Driver
Display code RAM (8-bit x 60)
4.8
0
0
0
0
–11.8
2.9
code select
XIN 7 XOUT 6
Clock generator
timing clock
Display controller
scan pulse
Segment digit select/ output circuit
50 49 48 47 46
* All voltages are measured with a 10MΩ/V DC electronic volt meter. * Components having special characteristics are marked Z and must be replaced with parts having specifications equal to those originally installed. * Schematic diagram is subject to change without notice.
4.8
0
0
0
DISPLAY DRIVER
~ ~
0
~
–25.1
–21.7
~
–28.6
~
Page 80
G-1
~
4.8
4.8
–22.5 –26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
10
Digit output circuit
63
RESET 1 Vcc1 Vcc2 Vss Vp
8 18 5 64
53
DIG10
Z
83
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
RX-V750/DSP-AX750/DSP-AX750SE RX-V650/HTR-5760
s SCHEMATIC DIAGRAM (OPERATION)
Code write
IC901 : µPC4570G2 Dual OP-Amp
CGROM (35 bit x 166)
44
SEG00 SEG25 SEG26 SEG34
OUT1 1 –IN1 2 +IN1 3 –VCC 4
8 +VCC 7 OUT2 6 –IN2 5 +IN2
Segment output circuit
4.8
0
0
0
0
0
0
code select
XIN 7 XOUT 6
Clock generator
timing clock
Display controller
scan pulse
Segment digit select/ output circuit
50 49 48 47 46
10
Digit output circuit
* All voltages are measured with a 10MΩ /V DC electronic volt meter. * Components having special characteristics are marked Z and must be replaced with parts having specifications equal to those originally installed. * Schematic diagram is subject to change without notice.
Code write
IC901 : µPC4570G2 Dual OP-Amp
CGROM (35 bit x 166)
44
SEG00 SEG25 SEG26 SEG34
OUT1 1 –IN1 2 +IN1 3 –VCC 4
8 +VCC 7 OUT2 6 –IN2 5 +IN2
Segment output circuit
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
–26.4
0 0
0 5.1 5.1 0 5.0
11.8 0 0 0 0 0.1 0 –10.4 –10.4
4
–26.4
–26.4
–26.4
–26.4
–26.4
–28.6
5
6
–11.8
2.9
OPTIMIZER MIC AMP
–26.4
–26.4
–28.6
~
TO FUNCTION (1) CB306
0
0 0 0
4
0
5
5.1
5.1
X: NOT USED O: USED / APPLICABLE
0
0
5.0
0
11.8 0
4.8
0 0
0 –10.4 0 0.1 –10.4
4.8
6
0
OPTIMIZER MIC AMP