电子信息科学与技术专业课程设计任务书一．设计说明根据要求可自动出售两种货物，本文设计的自动售货机可销售cola 和pepsi两种饮料：售货机可识别1元和0.5元的两种货币，在一次购买过程中，可购买一个或多个商品，系统会自动计算所需钱数和找零的钱数并自动找零。

另外有3个发光二极管、6个LCD数码管：两个用来显示所需金额，两个用来显示已付金额，两个用来显示找零数。

1.1.1 流程说明本文设计的自动售货机当通电时，表示一次销售的开始。

顾客选择一种商品或多种商品后就进入投币状态。

若不投币，则自动返回初始状态。

投币后，系统自动计算所投钱数。

若投币够，则出货并找零。

若投币不够，如果顾客没有继续投币，则退币并回到初始状态。

本系统的投币销售流程图如图所示：1.1.2各模块说明本文设计的自动售货机总体分三个模块：总控模块，二进制译码模块、BCD 码译码模块。

总控模块：总控模块是本系统最重要的模块，该模块大体有5个输入端口和6个输出端口。

其输入端口包括clk、coin1（投入一元货币）、coin5（投入0.5元货币）、cola（选择cola）、pepsi(选择pepsi)，输出端口有paid（已投入多少钱）、needed（还需多少钱）moneyout（找零）、success（灯亮表示交易成功）、failure（灯亮表示交易失败）、showmoneyout（灯亮表示正在找零）。

该模块实现了本系统最重要的交易过程，包括选择商品、投入货币，计算剩余金额，找零出货等。

二进制译码模块：该模块有一个输入端口和两个输出端口。

输入端口是一个8位的二进制数输出端口bcd0、bcd1是两个4位的BCD码。

该模块的主要的功能是实现将主控模块输出的二进制数（paid、needed、moneyout）转换成BCD 码，以便输出到七段数码管上显示出来。

该模块的原理是将一个8位的二进制转换成2个4位的BCD码，分为高四位和低四位。

BCD码译码模块：该模块有一个输入端口和一个输出端口1.1.3 程序设计主控模块完整程序如下：Library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;entity shouhuoji isport(clk: in std_logic;coin1:in std_logic;coin5:in std_logic;cola:in std_logic;pepsi:in std_logic;paid:out std_logic_vector(7 downto 0);needed:out std_logic_vector(7 downto 0);success:out std_logic;failure:out std_logic;showmoneyout:out std_logic;moneyout:out std_logic_vector(7 downto 0));end shouhuoji;architecture behav of shouhuoji istype state_type is (qa,qb,qe,qc,qg,qd,qf);--定义七个状态signal current_state :state_type:=qa;signal q:integer range 0 to 100;beginprocess(clk)variable paidtemp:std_logic_vector(7 downto 0);--定义变量variable neededtemp:std_logic_vector(7 downto 0);variable backmoney:std_logic_vector(7 downto 0);variable pricetemp:std_logic_vector(7 downto 0);beginif clk'event and clk='1' thencase current_state iswhen qa=>paidtemp:="00000000";neededtemp:="00000000";backmoney:="00000000";pricetemp:="00000000";q<=0;showmoneyout<='0';moneyout<="00000000";paid<="00000000";needed<="00000000";failure<='0';success<='0';if cola='1' or pepsi='1' then current_state<=qb;if cola='1' then pricetemp:=pricetemp+"00001111";neededtemp:=pricetemp;Elsepricetemp:=pricetemp+"00010100";neededtemp:=pricetemp;end if;end if;paid<=paidtemp;needed<=neededtemp;when qb=>if coin1='1' or coin5='1' thenif coin1='1'then paidtemp:=paidtemp+"00001010";elsepaidtemp:=paidtemp+"00000101";end if;if paidtemp>=pricetemp then backmoney:=paidtemp-pricetemp; neededtemp:="00000000";current_state<=qd;else neededtemp:=pricetemp-paidtemp;backmoney:="00000000"; current_state<=qc;q<=0;end if;paid<=paidtemp;needed<=neededtemp;end if;if q<8 then q<=q+1;if cola='1' or pepsi='1'then q<=0;if cola='1' then pricetemp:=pricetemp+"00001111"; neededtemp:=neededtemp+"00001111";elsepricetemp:=pricetemp+"00010100";neededtemp:=neededtemp+"00010100";end if;paid<=paidtemp;needed<=neededtemp;end if;else current_state<=qe;q<=0;end if;when qe=>failure<='1';if q<4 then q<=q+1;else current_state<=qa;q<=0;end if;when qc=>if coin1='1' or coin5='1' thenif coin1='1'then paidtemp:=paidtemp+"00001010";elsepaidtemp:=paidtemp+"00000101";end if;if paidtemp>=pricetemp thenbackmoney:=paidtemp-pricetemp;neededtemp:="00000000";current_state<=qd;else neededtemp:=pricetemp-paidtemp;backmoney:="00000000"; current_state<=qc;end if;paid<=paidtemp;needed<=neededtemp;end if;if coin1/='1'and coin5/='1' thenif q<10 then q<=q+1;else current_state<=qg;end if;else q<=0;end if;when qg=>failure<='1';showmoneyout<='1';moneyout<=paidtemp;current_state<=qf;q<=0;success<='0';when qd=>success<='1';if backmoney>"00000000"then showmoneyout<='1';moneyout<=backmoney;end if;current_state<=qf;q<=0;when qf=>if q<4 then q<=q+1;else current_state<=qa;q<=0;end if;end case;elseend if;end process;end behav;BCD译码模块完整程序如下：Library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;entity code1 isport(b:in std_logic_vector(7 downto 0);bcd0:out std_logic_vector(3 downto 0);bcd1:out std_logic_vector(3 downto 0)) ;end code1;architecture one of code1 isbeginprocess(b)begincase b iswhen"00000000"=>bcd0<="0000";bcd1<="0000";--译码“0”；when"00000001"=>bcd0<="0001";bcd1<="0000";--译码“1”；when"00000010"=>bcd0<="0010";bcd1<="0000";--译码“2”；when"00000011"=>bcd0<="0011";bcd1<="0000";--译码“3”；when"00000100"=>bcd0<="0100";bcd1<="0000";--译码“4”；when"00000101"=>bcd0<="0101";bcd1<="0000";--译码“5”；when"00000110"=>bcd0<="0110";bcd1<="0000"; when"00000111"=>bcd0<="0111";bcd1<="0000"; when"00001000"=>bcd0<="1000";bcd1<="0000"; when"00001001"=>bcd0<="1001";bcd1<="0000"; when"00001010"=>bcd0<="0000";bcd1<="0001"; when"00001011"=>bcd0<="0001";bcd1<="0001"; when"00001100"=>bcd0<="0010";bcd1<="0001"; when"00001101"=>bcd0<="0011";bcd1<="0001"; when"00001110"=>bcd0<="0100";bcd1<="0001"; when"00001111"=>bcd0<="0101";bcd1<="0001";when"00010000"=>bcd0<="0110";bcd1<="0001"; when"00010001"=>bcd0<="0111";bcd1<="0001"; when"00010010"=>bcd0<="1000";bcd1<="0001"; when"00010011"=>bcd0<="1001";bcd1<="0001"; when"00010100"=>bcd0<="0000";bcd1<="0010";译码“20”when others=>null;end case;end process;end one;顶层模块完整程序如下：library IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL;entity top isPort( clk1:in std_logic;C1,C5,P1_5,P2:in std_logic;paid_lcd0,paid_lcd1,needed_lcd0,needed_lcd1,Mout_lcd0,Mout_lcd1:out std_logic_vector(3 downto 0);s,f,showout :out std_logic );end top;architecture one of top iscomponent shouhuojiport ( clk:in std_logic;coin1:in std_logic;coin5:in std_logic;cola:in std_logic;pepsi:in std_logic;paid:out std_logic_vector(7 downto 0);needed:out std_logic_vector(7 downto 0);success:out std_logic;failure:out std_logic;showmoneyout:out std_logic;moneyout:out std_logic_vector(7 downto 0));end component;component code1port(b:in std_logic_vector( 7 downto 0);bcd0:out std_logic_vector(3 downto 0);bcd1:out std_logic_vector(3 downto 0));end component;signal p,n,mo:std_logic_vector( 7 downto 0);--signal s1,s2,s3,s4,s5,s6:std_logic_vector(3 downto 0);beginu0:shouhuoji--各模块连接port map(clk=>clk1,coin1=>C1,coin5=>C5,cola=>P1_5,pepsi=>P2,success=>s,failure=>f,showmoneyout=>showout,paid=>p,needed=>n,moneyout=>m o);u1:code1 port map(b=>p,bcd0=>paid_lcd0,bcd1=>paid_lcd1);u2:code1 port map(b=>n,bcd0=>needed_lcd0,bcd1=>needed_lcd1);u3:code1 port map(b=>mo,bcd0=>Mout_lcd0,bcd1=>Mout_lcd1);end one;1.1.4各模块的连接各模块的连接如图所示：售货机主控系统和译码器模块图售货机顶层模块2、1 主控模块的仿真上图表示顾客选择了pepsi饮料后，且投了2个一元的硬币。