★项目2：数字信号源项目简述：设计制作一个正弦信号发生器。

（1）正弦波输出频率范围：1kHz～10MHz；（2）具有频率设置功能，频率步进：100Hz；（3）输出信号频率稳定度：优于10-2；（4）输出电压幅度：1V到5V这间；（5）失真度：用示波器观察时无明显失真。

（6）输出电压幅度：在频率范围内50负载电阻上正弦信号输出电压的峰-峰值V opp=6V±1V；（7）产生模拟幅度调制(AM)信号：在1MHz~10MHz范围内调制度m a可在30%～100%之间程控调节，步进量50%，正弦调制信号频率为1kHz，调制信号自行产生；（8）产生模拟频率调制(FM)信号：在100kHz~10MHz频率范围内产生20kHz最大频偏，正弦调制信号频率为1kHz，调制信号自行产生；（9）产生二进制PSK、ASK信号：在100kHz固定频率载波进行二进制键控，二进制基带序列码速率固定为10kbps，二进制基带序列信号自行产生；开发时间：2007 开发人数：1运行环境：windows xp、Quartus II相关内容：（还未整体综合）下面是调幅原理图：下面是调频原理图：Location P IN_28Option Value VCCclkINPUT Location P IN_2Location P IN_4Location P IN_6Location P IN_8Location P IN_12Location P IN_14Location P IN_16LocationP IN_18Option Value VCCp0[7..0]INPUT LocationP IN_44Option...V alue...VCC CSKF[2..0]INPUT Location P IN_20Location P IN_23LocationP IN_42Option Value VCCCSKC[2..0]INPUT Location P IN_180Option Value daclkOUTPUTLocation P IN_175Location P IN_176Location P IN_173Location P IN_174Location P IN_169Location P IN_170Location P IN_167Location P IN_168Location P IN_165LocationP IN_166Option Value qout[9..0]OUTPUT NOT inst23GNDaddress[11..0]clockq[9..0]sin_rom0inst2data[7..0]cskc[2..0]cskf[2..0]oenkc[23..0]kf[23..0]xsj1instABA+Bdataa[23..0]datab[23..0]result[23..0]lpm_add_sub0inst15ABA+Bdataa[23..0]datab[23..0]result[23..0]lpm_add_sub0inst16DFFdata[23..0]clockq[23..0]lpm_dff0inst10ABA+Bdataa[23..0]datab[23..0]result[23..0]lpm_add_sub0inst17GNDDFFdata[23..0]clockq[23..0]lpm_dff0inst9address[11..0]clockq[9..0]sin_rom0inst3GNDQQ[23..0]qa[23..0]QQ[23..12]qd[23..0]qb[23..0]qa[14..5]q a [23..15]q a [4..0]qu[23..12]qd[23..0]qb[23..0]qu[23..0]下面是正弦信号发生器设计原理图：L o c a t i o n P I N _28O p t i o n V a l u e V C Cc l kI N P U T L o c a t i o n P I N _2L o c a t i o n P I N _4L o c a t i o n P I N _6L o c a t i o n P I N _12L o c a t i o n P I N _14L o c a t i o n P I N _16L o c a t i o n P I N _18L o c a t i o nP I N _8O p t i o n V a l u e V C Cp 0[7..0]I N P U T C CP U T V C CI N P U T V C CI N P U T L o c a t i o n P I N _180O p t i o n V a l u e d a c l kO U T P U T L o c a t i o n P I N _166L o c a t i o n P I N _165L o c a t i o n P I N _168L o c a t i o n P I N _167L o c a t i o n P I N _170L o c a t i o n P I N _169L o c a t i o n P I N _174L o c a t i o n P I N _173L o c a t i o n P I N _176L o c a t i o nP I N _175O p t i o n V a l u e q o u t [9..0]O U T P U TG N DN O Ti n s t 24a d d r e s s [11..0]c l o c k q [9..0]s i n _r o m 0i n s t 2O C T A L L A T C H E SD [8..1]GO E N Q [8..1]74373bn s t 6G N DA BA +B d a t a a [47..0]d a t a b [47..0]re s u l t [47..0]l p m _a d d _s u b 1i n s t 3D F Fd a t a [47..0]c l o c k q [47..0]l p m _d f f 0i n s t 8d a t a [7..0]c s k c [5..0]oe nk c [47..0]x s j 1i n s t3:8 D E C O D E RA B G 1C G 2A N G 2B N Y 0N Y 1N Y 2N Y 3N Y 4N Y 5N Y 6N Y 7N 74138n s t 5O C T A L L A T C H E SD [8..1]GO E N Q [8..1]74373bi n s t 10U n s i g n e d m u l t i p l i c a t i o nd a t a a [9..0]d a t a b [15..0]r e s u l t [25..0]l p m _m u l t 0i n s t 16N O Ti n s t 17N O T i n s t 18N O T i n s t 19N O T i n s t 20N O T i n s t 22N O T i n s t 23N O T i n s t 25N O T i n s t 26c s [5..0]q q [47..0]q a [7..0]c s 7q a [15..8]c s 6c s 0c s 1c s 2c s 3c s 6c s 7c s 5c s 4q q [31..20]q a [15..0]q o u t [9..0]q o u [9..0]路漫漫其修远兮，吾将上下而求索 - 百度文库下面是PSK 设计原理图：Location P IN_28Option Value VCCclkINPUT Location P IN_2Location P IN_4Location P IN_6Location P IN_12Location P IN_14Location P IN_16Location P IN_18LocationP IN_8Option Value VCCp0[7..0]INPUT Location P IN_23Option Value VCCdz0INPUT Location P IN_42Option Value VCC dz1INPUT Location P IN_44Option Value VCCdz2INPUT VCCdz3_pskINPUT Location P IN_180Option Value daclkOUTPUTLocation P IN_166Location P IN_165Location P IN_168Location P IN_167Location P IN_170Location P IN_169Location P IN_174Location P IN_173Location P IN_176Location P IN_175Option Value qout[9..0]OUTPUT NOTinst24address[11..0]clockq[9..0]sin_rom0inst2OCTAL LATCHE S D[8..1]GOE N Q[8..1]74373binst6GNDABA+Bdataa[47..0]datab[47..0]result[47..0]lpm_add_sub1inst3DFFdata[47..0]clockq[47..0]lpm_dff0inst8data[7..0]cskc[5..0]oenkc[47..0]xsj1inst3:8 DE CODE RA B G1C G2AN G2BN Y0NY1N Y2N Y3N Y4N Y5N Y6NY7N74138inst5GNDVCCOCTAL LATCHE SD[8..1]GOE N Q[8..1]74373binst10Unsigned multiplicationdataa[9..0]datab[15..0]result[25..0]lpm_mult0inst16NOTinst17NOTinst18NOTinst19NOT inst20NOTinst22NOTinst23NOTinst25NOTinst26VCCddio bidirpower up highdatain_h[11..0]datain_l[11..0]outclockpadio[11..0]altddio_bidir0inst4A BA-B dataa[11..0]datab[11..0]result[11..0]lpm_add_sub2inst1cs[5..0]qq[31..20]qa[15..0]qou[9..0]p s kqa[7..0]cs7qa[15..8]cs6cs5cs6cs1cs0cs2cs3cs4cs7pskqou[9..0]qq[47..0]GND。