目 录
1 NiosⅡ CPU的体系结构 3
1.1 NiosⅡ处理器的结构 .............................................................................................................................3
1.2 NiosⅡ处理器的基本组成 .....................................................................................................................3
1.3 Debug模块 .............................................................................................................................................3
1.4 NiosⅡ开发环境简介 .............................................................................................................................3
2 IP核 4
2.1 SDRAM控制器......................................................................................................................................4
2.2FLASH .....................................................................................................................................................5
3 基于SOPC的温湿度监测系统设计 5
3.1 系统总体设计方案 ................................................................................................................................5
3.2 SOPC硬件系统设计 ..............................................................................................................................6
3.3 SOPC软件系统设计 ..............................................................................................................................9
3.3.1 NiosⅡ 软件系统设计 ................................................................................................................9
3.3.2 NiosⅡ IDE C/C++Build属性配置 ..........................................................................................13
3.3.3 软件系统的设计流程 ...............................................................................................................15
4 实验结果与分析 15
结 论 18
No 1 摘 要
SOPC是可编程片上系统，即一种特殊的嵌入式系统。首先它是片上系统（SOC），由单个芯片完成整个系统的主要逻辑功能；其次，它是可编程系统，具有灵活的设计方式，可裁减、可扩充、可升级，并具备软硬件在系统可编程的功能。SOPC是基于FPGA解决方案的SOC，与ASIC的SOC解决方案相比，SOPC系统及其开发技术具有更多的特色。构成SOPC的途径有基于FPGA嵌入IP硬核的系统、基于FPGA嵌入IP软核的系统和基于HardCopy技术的SOPC系统三种方式。本文介绍基于FPGA的嵌入IP软核的SOPC系统实现方法，设计了一种基于SOPC的温湿度监测系统。通过Quartus II 软件里的SOPC builder把Nios II Processor、Avalon总线、UART、SDRAM_controller、Flash Memory、Avalon三态桥等多个IP核集成生成系统所需的SOPC。传感器扩展板采用Mega8作为主控芯片，用于数据的采集、显示以及和PC的通信。同时配有由SPI总线控制的数码管，可以显示传感器的测量结果，以及与PC通信过程中的具体情况。对外采用波特率为115200的串口进行通信，用户可通过串口向该模块发出各种查询命令以查询传感器的状态。本次设计使用NiosII IDE编写应用程序，发送相应指令，获取温度和湿度的值，同时显示在Console窗口。
关键词：
SOPC技术；FPGA开发板；IP核；温湿度监测；NiosⅡ处理器；Mega8芯片
No 2 Abstract
SOPC is System-On-a-Programmable-Chip, that is a special embedded system: First, it is
the system on chip (SOC), which completes the main logic function of the whole system on a
single chip; second, it is a programmable system with a flexible design approach which is
reducible, scalable, and has the software and hardware in-system programmable functions.
SOPC is a kind of special SOC which is based on FPGA solutions and there are more features
compared with the SOC and ASIC solutions; three approaches are available to constitute a SOPC:
based on embedded hard IP-core FPGA, based on embedded soft IP-core FPGA and based on
Hardcopy technology. Each of them has its own characteristics. This article describes the
embedded SOPC system based on soft IP core of Altera's FPGA,which is used to design a
temperature and humidity monitoring system .Using the SOPC builder of the Quartus II software,
we integrate Nios II Processor, Avalon bus, UART, Sdram_controller, Flash Memory, Avalon
tristate bridge, and other IP cores to generate the SOPC that the system needs.The sensor
expansion board use Mega8 as the main chip for data acquisition, display and PC communication.
At the same time, the board has nixietube controlled by the SPI bus, which is used to display the
sensor measurements and the specific situation of communication with PC. A user can issue the
query command to query the status of the sensor through the115200 serial port of the external
communication. This design uses the Nios II IDE to write application,sending the appropriate
instructions and obtaining the temperature and humidity values displayed in the Console
window.
Keywords:
SOPC technology; the development board of FPGA; IP Core; Temperature and humidity
monitoring; NiosⅡprocessor; Mega8 chip
No 3 1 NiosⅡ CPU的体系结构
1.1 NiosⅡ处理器的结构
Nios嵌入式处理器系统包括一个或多个Nios CPU、Avalon交换总线和其他组件[7]。下列组件可以生成基于Nios处理器的嵌入式系统
Nios CPU ,Avalon总线 ,外围设备和存储器接口,片内调试模块
Nios处理器系统包含带指令和数据高速缓存的Nios CPU，片内调试模块、直接存储器存取（DMA）控制器、常用外围设备（PIO、UART、以太网口和存储器接口等）和并行多控制Avalon交换结构总线。
1.2 NiosⅡ处理器的基本组成
NiosⅡ处理器包括如下功能单元,寄存器文件,ALU ,自定义指令逻辑的接口,异常控制器,指令总线,数据总线,指令高速缓存和数据高速缓存,指令和数据的存储器接JTAG调试模块。
1.3 Debug模块
Altera的合作伙伴FS2和Accelerated Techonlogy提供给Nios嵌入式处理器开发者顶级调试工具。可配置的Nios CPU可选择包括FS2的片内调试模块（OCI）。OCI提供包括运行控制、硬件断点，片内跟踪和片外跟踪等电路仿真器。用户可以使用Altera开发套件中的ByteBlasterⅡ下载电缆或FS2的目标系统分析器连接OCI，在主程序中存取OCI。
1.4 NiosⅡ开发环境简介
Nios嵌入式处理器系统的开发环境包括硬件和软件两部分。
Nios系统设计人员可以使用Nios开发工具创建高性能的可编程片上系统（SOPC）。有效的Nios嵌入式处理器开发工具允许用户配置一个或多个Nios