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文档之家› 第一章 微纳加工技术发展概述
第一章 微纳加工技术发展概述
第九章 扩散(已学)
第十章 后端工艺
第十一章 未来趋势与挑战
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教材
作者:唐天同,王兆宏
西安交通大学 电子工业出版社,2010
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教材
(美) James D. Plummer, Michael D. Deal, Peter B. Griffin 著, 2005,电子工业出版社
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分数比例
作业 15% 考勤 15% 实验 20% 考试 50%
• First “passivated (钝化)” junctions.
• 平面工艺: 二氧化硅屏蔽的扩散技术 光刻技术
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光刻 Photolithography
• Basic lithography process
– Apply photoresist – Patterned exposure – Remove photoresist regions – Etch wafer – Strip remaining photoresist
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ITRS— International Technology Roadmap for Semiconductors / ❖预言硅主导的IC技术蓝图
/instruct/bachelor/jpkc/jcdlgy/supplement/2011ExecSum.pdf
• Chapter 1 also contains some review information on semiconductor materials semiconductor devices. These topics will be useful in later chapters of the text. 34
ITRS硅技术发展规划
ITRS at /
• 1990 IBM demo of Å scale “lithography”. • Technology appears to be capable of making structures much smaller than currently known device limits.
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Robert Noyce与他发明的集成电路
专利号:No.2981877,批准时间1961.4.26
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简短回顾:一项基于科学的伟大发明
➢Bardeen, Brattain, Shockley, First Ge-based bipolar transis tor invented 1947, Bell Labs. Nobel prize ➢Kilby (TI) & Noyce (Fairchild), Invention of integrated circ uits 1959, Nobel prize ➢Atalla, First Si-based MOSFET invented 1960, Bell Labs. ➢Planar technology, Jean Hoerni, 1960, Fairchild ➢First CMOS circuit invented 1963, Fairchild ➢“Moore’s law” coined 1965, Fairchild ➢Dennard, scaling rule presented 1974, IBM ➢First Si technology roadmap published 1994, USA
– Metal Deposition – Patterning – Fill Dielectric – Planarization – Contact vias – Contact Deposition
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Summary of Key Ideas
• ICs are widely regarded as one of the key components of the information age.
“The number of transistors incorporated in a chip will approximately double every 24 months.”
Known as Moore's Law, his prediction has enabled widespread proliferation of technology worldwide, and today has become shorthand for rapid technological change.
Advantages and Challenges Associated with the Introduction of 450mm Wafers :Aposition paper report submitted by the ITRS Starting Materials Sub-TWG, June 2005. /papers.html
Gate Drain
衬底 Substrate
栅极:开关作用,取决于电压大小。
N+:提供电子,提高开关时间。
绝缘层防止Na+、K+干扰。
沟道为P型。
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n+
n+
p+
p+
G端为高电平时导通
G端为低电平时导通
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反向器 输入:高电平,相当于1,输出0 输入:低电平,相当于0,输出1
没有形成回路,功耗低
• Silicon technology has become a basic “toolset” for many areas of science and engineering.
• Computer simulation tools have been widely used for device, circuit and system design for many years. CAD tools are now being used for technology design.
• The era of “easy” scaling is over. We are now in a period where
technology and device innovations are required. Beyond 2020, new
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currently unknown inventions will be required.
• CMOS has become the dominant circuit technology because of its low DCpower on sumption, high performance and flexible design options. Future projections suggest these trends will continue at least 15 more years.
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1.2.2 促成集成电路产生的几项关键发明
J. Bardeen W. Brattain
W. Shockley
• Invention of the bipolar transistor (点接触晶体管)- 1947, Bell Labs.
1956年诺贝尔物理奖
点接触晶体管:基片是N型锗,发射极和集电极是两根 金属丝。这两根金属丝尖端很细,靠得很近地压在基片 上。金属丝间的距离:~50μm
On April 19, 1965 Electronics Magazine published a paper by Gordon Moore in which he made a prediction about the semiconductor industry that has become the stuff of legend.
• Basic inventions between 1945 and 1970 laid the foundation for today‘s silicon industry.
• For more than 40 years, "Moore's Law" (a doubling of chip complexity every 2-3 years) has held true.
微纳加工技术原理
第一章 微纳加工技术发展概述
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主要内容
1.1
本课程的主要内容
1.2
集成电路的发展
1.3
MEMS技术简介
1.4
苏州纳米区简介
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1.1 课程的主要内容
第一章 微纳加工技术发展概述
第二章 CMOS工艺流程
第三章 洁净室、晶圆片清洗与吸杂处理
第四章 光刻
第五章 薄膜淀积
第六章 刻蚀
第七章 热氧化和Si-SiO2界面 第八章 离子注入
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CMOS (Complementary Metal Oxide Semiconductor) : PMOS管和NMOS管 互补共同构成的MOS集成电路。
• Metal Planarization required for multiple metal layers
10亿
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Gordon Moore:Intel 创始人
/pressroom/kits/events/moores_law_40th/index.htm?iid=tec h_mooreslaw+body_presskit
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IC最小特征尺寸的发展历史及规划
Device Scaling Over Time
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1.2 集成电路工艺的发展
1.2.1 集成电路工艺的发展历程 1.2.2 促成集成电路产生的几项关键发明 1.2.3 半导体器件
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1.2.1 集成电路工艺的发展历程